What has shipped and what is planned.
v2.0 shipped on 2026-07-25. The compliance matrix gives the status of each IEEE 1800-2023 clause.
Everything below is in the current release. The Since column marks what came with v1 and what v2.0 added.
| Capability | Since | Status |
|---|---|---|
| 4-state simulation (0, 1, X, Z) | v1 | Shipped |
| Synthesizable SystemVerilog (modules, generate, packages, interfaces, parameters) | v1 | Shipped |
| VPI, used by cocotb testbenches | v1 | Shipped |
| Code coverage (line, branch, toggle) with LCOV output | v1 | Shipped |
| VCD / FST waveform generation | v1 | Shipped |
| IEEE 1735 IP encryption / decryption | v1 | Shipped |
| DPI | v1 | Shipped (partial; see the matrix) |
| Linux builds for Ubuntu, Debian, Rocky and Fedora (supported versions) | v1 | Shipped |
| Stratified region scheduler (cl. 4) with suspendable processes | v2.0 | Shipped |
Behavioral timing: # delays (incl. intra-assignment), mid-procedure @, wait, timing in tasks (cl. 9, 10, 13) |
v2.0 | Shipped |
Native output: $display/$write/$monitor/$strobe and the $random family run in the design; v1 ran them over VPI only (cl. 20, 21) |
v2.0 | Shipped |
fork/join/join_any/join_none, disable, wait fork, the process class (cl. 9) |
v2.0 | Shipped |
IPC: named event, semaphore, mailbox (cl. 15) |
v2.0 | Shipped |
| Dynamic data: queues, dynamic and associative arrays, array manipulation methods, string methods, packed multi-dimensional arrays (cl. 6, 7) | v2.0 | Shipped (partial; see the matrix) |
Classes and OOP: inheritance, virtual methods, $cast, parameterized and interface classes, virtual interfaces (cl. 8, 25) |
v2.0 | Shipped |
Randomization and constraints: rand/randc, constraint blocks, randomize() with, randcase/randsequence (cl. 18) |
v2.0 | Shipped |
| Functional coverage: covergroups, coverpoints, bins, crosses, coverage computation (cl. 19) | v2.0 | Shipped (partial; see the matrix) |
Clocking blocks, program blocks, final, $exit (cl. 14, 24) |
v2.0 | Shipped |
Assertions: immediate and concurrent SVA, sampled-value functions, sequence local variables, recursive properties, expect, let, assertion control (cl. 16) |
v2.0 | Shipped |
| Checkers (cl. 17) | v2.0 | Shipped |
DPI completion and the remaining system tasks: UVM DPI helpers, file I/O, $dist_* (cl. 20, 21, 35) |
v2.0 | Shipped (partial; see the matrix) |
UVM: uvm_pkg compiles and runs; SystemVerilog testbenches run without VPI |
v2.0 | Shipped |
| Design-true VCD / FST timescales (cl. 22) | v2.0 | Shipped |
Multi-core RTL evaluation (--threads), per-host -march detection, SIMD runtime dispatch |
v2.0 | Shipped |
RyuSim does not yet implement the items below. A design that uses one of
the constructs marked rejected fails to compile with an
unsupported construct error. Some of the others compile
without a diagnostic and have no effect; the compliance matrix lists which
under Accepted without
a diagnostic.
vpi_get64,
vpi_get_data and vpi_put_data.interconnect, trireg and user-defined nettypes
(clause 6). Rejected.with clause (11.4.14.4). Rejected.case … matches and
if … matches (12.6). Rejected.--gpu flag still parses, prints a
deprecation warning, and has no effect (exit status is unchanged).v2 is the active line. The v1 maintenance branch is sunset as of the v2.0 release: v1 downloads stay hosted indefinitely, but no further v1 releases are planned. See Downloads for installing a specific version or channel.